# Determine the output voltage of an op-amp for input voltage of 200 uV and 160 uV. the differential gain of op-amp is 4000 and value of CMRR is 150

By   August 11, 2020

Intro Exercise-7

1. Determine the output voltage of an op-amp for input voltage of 200 uV and 160 uV. the differential gain of op-amp is 4000 and value of CMRR is 150.

(a) 16 V

(b) 164.8 mV

(c) 64 mV

(d) 76 mV

1. (b) For CMRR of 150 and AD = 4000

VD = V1 – V2 = 200 – 160 = 40 uV

VC = V1 + V2 / 2 = 200 + 160 /2 = 180 uV

V0 = ADVD [1 + 1/CMRR VC/VD]

= 4000 x 40 x 10-6 [1 + 1/150 180/40]

= 164.8 mV

1. For the circuit shown below the value of AV = VO /VI is

(a) – 10

(b) 10

(c) -11

(d) 11

1. For the circuit shown below the value of AV = VO / VI

(a) -10

(b) 10

(c) 13.46

(d) -13.46

1. For the circuit shown below the value of AV = V0 / Vi is

(a) 5

(b) -5

(c) 6

(d) -6

1. For the circuit shown below, the value of VO is

(a) 4/3 V

(b) – 2/3 V

(c) 2/3 V

(d) – 4/3 V

1. For the circuit shown below the value of VO is

(a) -30 V

(b) 18 V

(c) – 18 V

(d) 28 V

1. The expression for the output voltage VO in terms of the input voltage V1 and V2 in the circuit shown below, assuming the operational amplifier to ideal is

The values of A1 and A2 would be respectively

(a) -9 and 10

(b) 9.9 and -10

(c) 9 and – 10

(d) -9.9 and 10

1. For the following circuit, the gain will be

(a) 5.92

(b) 2.82

(c) 4.67

(d) 1.93

1. In the circuit given below, the CMRR of the op-amp is 30 dB. the magnitude of the VO is

(a) 2 mV

(b) 100 mV

(c) 200 mV

(d) 1 mV

1. The output voltage produced by cascaded integrators at t = 0.5 s

(a) 6 V

(b) 4 V

(c) 3 V

(d) 10 V

1. In the op-amp circuit shown below, it is desired that V0 = V2/3 – 2V1, what is the value of R to achieve V0 ?

(a) 100 k

(b) 40 k

(c) 80 k

(d) 30 k

1. The gain of following circuit is

(a) R2/R1 (V2 – V1)

(b) R1/R2 (V1 – V2)

(c) R1/R2 (V2 – V1)

(d) R2/R1 (V1 -V2)

1. The input voltage in shown below circuit is VI = 5 sin 00t mV. the current IO is

(a) -2 sin 00t uA

(b) -2.2 sin 00t uA

(c) -5 sin 00t uA

(d) Zero

consider the following circuit :

1. The output voltage V0 is

(a) -12 V

(b) 12 V

(c) -18 V

(d) 18 V

1. Input impedance seen by the voltage source is

(a) 5 k

(b) 6/5 k

(c) 6 k

(d) 00

1. In the folllowing amplifier circuit the op-amp is ideal the voltage VB is

(a) zero

(b) – 1.2 v

(c) – 3 v

(d) 2.1 v

1. An audio amplifier is designed to have a small-signal bendwidth of 20 kHz. the open – loop low-frequency voltage gain of the op-amp is 105 and unity gain bandwidth is 1 MHz. what is the maximum closed-loop voltage gain for this amplifier ?

(a) 500

(b) 5 x 106

(c) 2 x 106

(d) 50

1. (a) This circuit is inverting amplifier.

We know AV = gain = RF / R1 = 400/40 = – 10

1. (a) The non-inverting terminal (B) is at ground level. thus inverting terminal ia also at virtual ground. there will not be any current in 60 k.

Gain = AV = – 400/40 = – 10

1. (a) The circuit is as follows

VO = VI = VB

Let VI the node voltage of T network.

VB/R + VB – V1 / R = 0

V1 = 2VB = 2VI

V1 – VB / R + V1 /R + V1 – VO /R = 0

3V1 = VB + VO

6V1 = VI + V0

V0 /VI = 5

1. (a) The circuit is as follows

Va = 6 x 6 / 48 + 6 = 2/3 V

Va = (1 + 10/10) Va = 4/3 V

1. (a) The circuit is as follows

V1 = VO(4) / 4 + 8 + 12(8) /4 + 8

Va = – 2 V, Va = Vb

VO /3 + 8 = – 2, VO = – 30 V

1. (b) VB = V1 – V1 / 110 x 11 = 0.9 V1

VA = VB = 0.9 V1

Again   V0 – VA / 100 = VA – V2 /10

Or     VO – 0.9 V1 /100 = 0.9V1 – V1 /10

Or       V0 = 9.9V1 – 10V2

Here,   A1 = 9.9 and A2 = – 10

1. (c) Gain of instrumentation amplifier is

A = R4 / R3 [1 + 2R1 / R2]

= 5.6/3.2 [1 + 2 x 4.7 / 5.6] = 1.75 (2.67)

= 4.67

1. (b) Va = 2 R/2R = 1 V

VB = 2 R/2R = 1 V

VD = VA – VB        VD = 0

VCM = VA + VB / 2 = 1

V0 = RFVCM / 1 CMRR

CMRR = 60 dB = 103

VO = 100/1 1/103 = 100 mV

1. (d) V1 = VINT/RC = 0.1TVS / 0.025

V1 = 4T Vat t = 0.5

= – 4 x 0.5 = – 2 V

V2 = – V1t / 2RC = – 4t2/ 2RC = 4t2 / 0.1s V

At  t = 0.5 s

V2 = 4V x 0.52/0.1 = 1/0.1 = 10 V

1. (c) VO1 = – RF / R1 V1 = – 2V1

V02 = [1 + RF /R1]VB

= [1 + 10 /5] x VB = 3VB

VB = V2 /(R + 10) x 10;  V02 = 30V2 /(R + 10)

V0 = V01 + V02 = – 2V1 + 30V2 /(R + 10)

As given VO = V2 /3 – 2V1

– 2V1 + 30V2 / R + 10 = V2/3 – 2V1

R = 80 K

1. (a) Applying KCL at A, we get

VX – V1 /R1 + VX – V/ R2 = 0

VX [R1 + R2 /R1R2] – V1 /R1 = V/R2 …………………(1)

At B, we get   VX – V2 /R1 + VX/R2 = 0

VX [1/R1 + 1/R2] = V2/R1 ………………(2)

Thus, from eqs. (1) and (2), we get

V2/R1 – V1/R1 = V/R2

V = R2/R1 (V2 – V1)

1. (b) We know, VA = – 15/5 (2 sin 00t) mV = – 6 sin 00t mV

Given,           AV = ro/ri = – RF/R1

I1 = V0/5 = – 1.2 sin 00t uA

I1 = I1 5sin 00t mV / 5 = 1 sin 00t uA

Ie = IL – I1 = – 1.2 sin 00t – sin 00t

= – 2.2 sin 00t uA

1. (a) The circuit is given by

Applying KVL to loop,

12 = 3 k I1 + 2K I1      I1 = 2.4 mA

I0 = I1 = 2.4 mA

I2 = – I2 = – 2.4 mA

V0 = I2 (1K) = -2.4 V

V0 = VA – IO(4K)

= – 24 – (2.4) (4) = – 12 V

1. (a) Input impedance is given by RIN = VS/IS

Applying KVL to input loop

VS – 3I1 – 0 – 2I1 = 0

RIN = VS/I1 = 5 K

1. (b) Output voltage VO is

VO = VS (R2/R1) = (-3) (-6.2 /1) = 18.6 V

V0 > 10 V,

So,  VO saturates at V0 = + 10 V

By writing node equation at inverting terminal

VB – (-3) /1 + VB – (10) / 6.2 = 0

VB [7.2/6.2] = – 3 + 10 /6.2

VB = – 3 (6.2/7.2) + 10/7.2 = – 1.2 V

1. (d) Bode plot for the frequency response of op-amp is given by

here, fcl x |ACL|MASS = FU x 1

fcl = close loop bandwidth

fu = unity gain bandwidth

|ACL|MAX = maximum closed loop gain

(20 x 103|ACL|MAX = 1 x 106

|ACL|max = 50