Stability Factor | types of stability factor | what is stability factor mcq | bias stability of transistor ? comparing fixed and collector to base bias which of the following statement is true ?

**Stability of Quiescent Operating Point**

Lat us assume that the transistor is replaced by an other transistor of same type. the B_{DC} of the two transistors of same type may not be same. therefore, if B_{DC} increases then for same I_{B}, output characteristic shifts upward. if B_{DC} decreases, the output characteristic shifts downeard. since, I_{B} is maintained constant therefore, the operating point shifts Q to Q_{1} as shown in fig. 13. the new operating point may be completely unsatifactory.

maintain V_{CE} and I_{C} constant as B_{DC} changes.

A second cause for bias instability is a variation in temperature. the reverse saturation current changes with temperature. specifically,I_{CO} doubles for every 10^{0}C rise in temperature. the collector current I_{C} causes the collector junction temperature to rise, which in turn increases I_{CO}. As a result of this growth I_{CO}, I_{C }will increase {B_{DC} I_{B} + (1 + B_{DC}) I_{CO}} and so on. it may be possible that this process goes on and the ratings of the transistor are exceeded. this increases in I_{C} changes the characteristic and hence, the operating point.

**Stability Factor**

The operating point can be made stable by keeping I_{C }and V_{CE} constant. there are two lechniques to make Q point stable

- stabilization techniques
- Compensation techniques

In first, resistor beasing circuits are used which allows I_{B} to vary so as to keep I_{C} relatively constant with variations in B_{DC,} I_{CO} and V_{BE}.

In second, temperature sensititive such as diodes, transistors are used which provide compensating voltage and current to maintain the operating point constant.

To compare different biasing circuits, stability factor S is defined as the rate of change of collector current with respect to the I_{CO}, keeping B_{DC }and V_{CE} constant.

S = I_{C} / I_{CO}

If S is large, then circuit is thermally instable. S cannot be less than unity. the other stability factors are I_{C} / B_{DC} and I_{C} / V_{BE}. The bias circuit, which provide stability with I_{CO}, also shows stability even if B and V_{BE} change.

I_{C} = B_{DC}I_{B} + (I + B_{DC}) I_{CO}

Differentiating with respect to I_{C}^{,}

1 = B_{DC} I_{B}/I_{C} + (1 + B_{DC}) / S

S = 1 + B_{DC}/ I_{B}

1 – B_{DC} / I_{C}

In fixed bias circuit, I_{B} and I_{C} are independent.

Therefore, I_{B }/ I_{C} = 0 and S= 1 + B_{DC}. If B_{DC} = 100, S =101, wgich means I_{C} increases 101 times as fast as I_{CO}. Such as large change definitely operate the transistor in saturation.

**Emitter Feedback Bias**

Fig . 14 shows the emitter feedback bias circuit in this circuit, the voltage across resistor R_{E} is used to offset the changes in B_{DC}. if B_{DC} increases, the collector current increases. this increases the emitter voltage which decreases the voltage across base resistor and reduces base current. the redued base current resulys in less collector current, which partially offsets the original increase in B_{DC} . the feedback term is used because output current (I_{C}) produces a change in input current (I_{E}). R_{E} is common in input and output circuits.

In this case,

V_{CC} = I_{B}R_{B }+ V_{BE} + I_{E}R_{E}

Since I_{E} = I_{C} + I_{B}

I_{B} / I_{C} = R_{E} / R_{B} + R_{E}

Therefore,

S = 1 + B_{DC} << (1 + B_{DC})

1 + B_{DC} (R_{E} / R_{B} + R_{E})

In this case, S is less compared to fixed bias circuits. thus, the stability of the Qpoint is better.

I_{E} = I_{C} = V_{CC} – V_{BE}

R_{E} + R_{B} / B_{DC}

If I_{C} is to made insensitive to B_{DC} then,

R_{E} >> R_{B} / B_{DC}

R_{E} cannot be made large enough to swamp out the effects of B_{DC} without saturating the transistor.

**Collector Feedback Bias**

In this case, the base resistor is retumed back to collector as shown in fig. 15. if temperature increases. B_{DC} increases. this produces more collector current. As I_{C} increases, collector-emitter voltage decreases. it means less voltage across R_{B} and causes a decrease in base current. this decreases I_{C} and compensating the effect of B_{DC}.

In this circuit, the voltade equqtion is given by

V_{CC} = (I_{B} + I_{C}) R_{C} + I_{B}R_{B} + V_{BE}

Circuit is stiff sensitive to change in B_{DC}. The advantage is that only two resistors are used. then.

I_{B} / I_{C} = – R_{C} / R_{B} + R_{C}

Therefore,

S = 1 + B_{DC} < 1 + B_{DC} < 1 + B_{DC}

1 + R_{C}B_{DC} / R_{B} + R_{C} 1 + B R_{E} / R_{B}

it is better as compare to fixed bias circuit.

Further, I_{C} = V_{CC}V_{BE}

R_{C} + R_{B } / B_{DC}

Circuit is still sensitive to change in B_{DC}. The advantage is that only two resistors are used.

**Voltage Divider Bias**

If the load resistance R_{C} is very samll e.g., in a transformer coupled circuit, then there is no improvement in stabilization in the collector to base bias circuit over fixed bias circuit. A circuit which can be used even if there is no DC resistance in series with the collector, is the voltage devider bias or self bias.

The current in the resistance R_{E} in the emitter lead causes a voltage drop which in the direction to reverse bias the emitter junction. since, this jusction must be forward biased, the base voltage is obtained from the supply through R_{1} , R_{2} network. if R_{B} = R_{1} || R_{2} equivalent resistance is very – very small, then V_{BE} voltage is independent of I_{CO} and I_{CO}. For best stability, R_{1} and R_{2} must be kept small.

If I_{C} tends to increase, because of I_{CO}, then the current in R_{C} increases, hence base current is decreased because of more reverse biasing and it reduces I_{C}.

To analyze this circuit, the base circuit is replaced by its thevenin’s equivalent as shown in fig. 16. (a).

Thevenin’s voltage is

V = R_{2} / R_{1} + R_{2} = V_{CC}

R_{B} = R_{1}R_{2} / R_{1} + R_{2}

R_{B} is the effective resistance seen back from the base terminal.

V = I_{B}R_{B} + V_{BE} + (I_{B} + I_{C}) R_{E}

If V_{BE} is considered to be independent of I_{C} then,

I_{B} / I_{C} = – R_{E} / R_{B} + R_{E}

S = 1 + B_{DC}

1 + B_{DC}R_{E} / R_{B} + R_{E}

If R_{B /}R_{C} = 0, then S = 1

If R_{B}/R_{C} = _{OO}, then S = (1 + B_{DC})

The smaller the value of R_{B}‘ the better is the stabilization but S cannot be reduced by unity.

Hence. I_{C} always increases more than I_{CO}. If R_{B} is reduced then current drawn from the supply increases, also if R_{E} is increased then to operate at same Q point, the magnitude of V_{CC} must be increased in both the cases the power loss increased and reduced h.

In order to avoid the loss of AC signal because of the feedback caused by R_{E}, this resistance is often by passed by a large capacitance (> 10 mF) so that its reactance at the frequency under consideration is very small.

**Emitter Bias**

Fig. 17 shows the emitter bias circuit.the circuit gets this name because the negetive supply V_{EE} is used to forward bias the emitter junction through resistor R_{E}. V_{CC} still reverse biases collector junction. this also gives the same stability as voltage divider circuit but it is used only if split supply is available.

In this circuit, the voltage equation is given by

I_{B}R_{B} + V_{BE} + I_{E}R_{E} = V_{EE}

Therefore, I_{B} = I_{C} / B_{DC} = I_{E} / B_{DC}

I_{E} = V_{EE} – V_{BE}

R_{E} + R_{B} / B_{DC}

If I_{C} or I_{E} is to be independent of B then,

R_{E} >> R_{B} / B_{DC}

Then, I_{E} = V_{EE}– V_{BE} / R_{E}

This shows that emitter is virtually at ground potential.

V_{CE} = V_{CC} – I_{C}R_{C}

Normally, R_{B} is selected less than 0.01 B_{DC} R_{E}.

**Example 5. **Determine the Q point for CE amplifier given in figure. if R_{1} = 1.5 k and R_{S} = 7 k. A transistor is used with B = 180, R_{E} = 100 and R_{C} = R_{Ioad }= 1 k. Also determine the P_{out (AC) }and the DC power delivered to the circuit by the source.

**Sol. **We first obtained the thevenin’s equivaent.

V_{BB} = R_{1} / R_{1} + R_{2} = V_{CC}

= 1500 / 1500 + 7000 x 5 = 0.882 v

and R_{B} = R_{1}R_{2} / R_{1} + R_{2} = 1.24 K

I_{CQ} = V_{BB} – V_{BE }/ R_{B/ }B + R_{E} = 0.882 – 0.7 / 1240/180 + 100

Note that this is not a desirable Q point location. since V_{BB} is very close to V_{BE}. Variation in V_{BE} therefore, significantly change I_{C}. We find R_{AC} = R_{C}||R_{load }= 500 and R_{DC} = R_{C} + R_{E} = 1.1K. The value of V_{CE} representing the quiescent value associated with I_{CQ} is found as follows:

V_{CE},_{Q} = V_{CC} – V_{CQ}R_{DC}

= 5 – (1. 70×10 ^{-3}) (1.1 x 10^{-3}) = 3.13 V

Then, V_{CC} = V_{CE},_{Q }+ I_{CQ} R_{AC}

= 3.13 + (1.7 x 10^{-3}) (500) = 3.98 V

Since, the Qpoint is on the lower half of the AC load line, the maximum possible symmrtrical output voltage swing is

2 (I_{CQ} – 0) (R_{C}||R_{load}) = 2 (1.70×10^{-3}) (500) = 1.70V_{P-P}

The AC power output can be calculated as

P_{out (AC) }= 1/2 I^{2}_{load} = 1/2 (1.7×10^{-3}x1000/2000)^{2}x1000

=0.361mW

The power drawn from the DC source is given by

P_{vcc (DC) }= I_{CQ}V_{CQ} + V^{2}_{CC}/R_{1} +R_{2} = 11.4 mW

The power loss in the transistor is given by

P_{transistor} = v_{ce}, _{Q} I_{CQ} = 3.13×1.70

= 5.32mW

The Q point in this example is not in the middle of the load line so that output swing is not as great as possible. however, if the input signal is small and maximum output is not required a small I_{C} can be used to reduce the power dissipated in the circuit.

**Moving Ground Around **

Ground is a reference point that can be moved around, e.g., consider a collector feedback bias circuit. the various stages of moving ground are shown in fig. 18.

**Biasing a p-n-p Transistor**

The biasing of p-n-p transistor is done similar to n-p-n transistor except that suppiy is of opposite polarity the various biasing circuits of p-n-p transmitter are shown in fig. 19.

**Example 6.** For the circuit shown in figure, calculate I_{C} and V_{CE}.

**sol.** Voltage across 1k resistor = 1/3 x30 =10 v

Therefore, I_{C} ~ I_{E} = 10 – 0.7 / 2 = 9.3 /2 = 4.65 mA

Therefore, V_{C} = 465×3

= 13.95 v

**AC Load Line**

Consider a DC equivalent circuit given in fig. 20 (a). Assume I_{C} = I_{C} (approximately), the output circuit voltage equation can be written as

V_{CE} = V_{CC} – I_{C} (R_{C} + R_{E})

and I_{C} = -V_{CE} / R_{C} + R_{E} + V_{CC} / R_{C} + R_{E}

V_{CE} = 0, I_{C} = V_{CC} / R_{C} + R_{E}

and I_{C} = 0, V_{CE} = V_{CC}

The slop of the DC load line is -1 /R_{C} + R_{E} When

considering the AC equivalent circuit, the output impedance becomes R_{C}||R_{L} which is less than (R_{C} + R_{E}).

In the absence of AC signal, this load line passes through Q point. therefore, AC load line is a line of slope {-1/(R_{C}||R_{L})} passing through Q point. through Q point. therefore. the output voltage fluctuations will be now corresponding to AC load line as shown in fig. 20 (b). under this condition, Q point is not in the maddle of load line therefore, Q point is sescted slightly upwaed, means slightly shifted to saturation side.

**Voltage Gain**

To find the voltage gain, consider an unloaded CE amplifier. the AC equivalent circuit is shown in fig. 21. the transistor can be replaced by its collector equivalent mosel i.e., a current source and emitter diode which offers AC resistance R’_{E}.

The input voltage appears directly across the emitter diode.

Therefore, emitter current I_{E} = V_{in}/R’_{E}

Since, collector current approximately equals emitter current I_{C} = I_{E} and V_{out} = – I_{E}R_{C} (the minus sign is used here to indicate phase inversion)

Further V_{out} = – (V_{in}R_{C}) /R’_{E}

Therefore, voltage gain A = V_{out} / V_{in} = – R_{C}/R’_{E}

The AC source driving an amplifier has to supply alternating current to the amplifier. the input impedance of an amplifier determines how much current the amplifier takes from the AC source.

In a normal frequency range of an amplifier, where all capacitors look like AC shorts and other reactances are negligible, the AC input impedance is defined as

Z = V_{in}/ I_{in}

Where,V_{in} and I_{in} are peak-to-peak values or rms values. the impedance looking directly into the base is symbolized Z_{in (base)} and is given by

Z_{in (base)} = V_{in}/ I_{B}

Since, V_{in} = I_{E}R’_{E}

>> B_{I}BR’_{E}

Z_{in (base)} = BR’E

From the AC equivalent circuit, the input impedance Z_{in} is the parallel combination of R_{1} and R_{2} and BR’_{E}

i.e., Z_{in} = R_{1}||R_{2}||BR’_{E}

The thevenin voltage appearing at the output is

V_{out} = AV_{in}

The thevenin impedance is the parallel combination of R_{C} and the internal impedance of the current source. the collector current source is an ideal source therefore, it has an infinite internal impedance.

Z_{out} = R_{C}

The simplified AC equivalent circuit is shown in fig. 22.

**Example 7. **Select R_{1} and R_{2} for maximum output voltage swing in the circuit shown in figure.

**Sol. **We first determine I_{CQ} for the circuit.

R_{AC} = R_{C} ||R_{load} = 500

R_{DC} = R_{E} + R_{C} = 1100

I_{CQ} = V_{CC} / R_{AC} + R_{DC} = 5/500+1100

= 3.13 mA

For maximum swing, V’_{CC} = 2V_{CE.Q}

The quiescent value for V_{CE} is given by

V_{CE.Q } = (3.13) (500) = 1.56 V

The intersection of the AC load line on the V_{CE} axis is V’_{CC} = 3.13 V from the manufacturer’s specifiction B for the 2N3904 is 180. R_{B} is set equal to 0.1 B R_{E}. So,

R_{B} = 0.1 (180) (100) = 1.8 KW

V_{BB} = (3.13×10^{-3}) (1.1×100) + 0.7 = 1.044 V

Since, we know V_{BB} and R_{B,} we find R_{1} and R_{2}

R_{1} = R_{B} / 1-V_{BB/}V_{CC} = 1800/ 1.044 = 2.28 K

R_{2} = R_{B}V_{CC}/ V_{BB} = 1800×5 /1.044 = 8.62 k

The maximum output voltage swing ignoring the non-linearity at saturetion and cut-off **would be maximum collector current swing = 2 I _{CQ} (R_{C}||R_{lout}) **

= 2 (3.13) (500)

= 3.13 V

The load lines are shown on the characteristics of the figure.

The maximum power dissipated by the transistor is calculated to assure that it does not exceed the specifications. the maximum average power dissipated in the transistor is

P_{(transistor) }= V_{CE.Q}I_{CQ} = (1.56) (3.13)

= 4.87 mW

This is well within the 350 mW maximum given on the specification sheet. the maximum conversion efficiency is

n = p_{out (AC) }/ P_{VCC (DC) }= (3.13×10^{-3/}2)^{2} x 1000/2×100 / 5×3.13×10^{-3}+5_{/}10.9×10^{-3}

= 6.84%

**The Swamped Amplifier**

The AC resistance of the emitter diode R’_{E} equals 25 mV/I_{E} and depends on the temperature. any change in R’_{E} will change the voltage gain in CE amplifier. in some applications, a change in voltage is acceptable. but in many applications we need a stable voltage gain is required.

To make it stable, a resistance R_{E} is inserted in series with the emitter and therefore, emitter is longer AC grounded fig. 23.

Because of this the AC emitter current flows through R_{E} and produces an AC voltage at the emitter, if R_{E} is much greater than R’_{E} almost all of the AC input signals appear at the emitter and the emitter is bootstrapped to the base for AC as well as for DC.

In this case, the collector current is given by

I_{C} = V_{in} / R’_{E} + R_{E}

and V_{out} = – I_{C }R_{C}

Therefore, A = V_{out} / V_{in} = – I_{C}R_{C} / I_{C} (R’_{E}+R_{E})

= -R_{C}/ R’_{E} + R_{E}

Now, R’_{E} has a less effect on voltage gain, swamping means R_{E}>> R’_{E} if swamping is less, voltage gain varies with temperature. if swamping is heavy, then gain reduces very much.